By Bernd Höfflinger
The liberate of this moment quantity of CHIPS 2020 coincides with the fiftieth anniversary of Moore’s legislation, a serious yr marked via the top of the nanometer roadmap and via a considerably lowered annual upward push in chip functionality. whilst, we're witnessing an information explosion within the web, that is eating forty% extra electrical energy each year, resulting in fears of a huge blackout of the net via 2020.
The messages of the 1st CHIPS 2020, released in 2012, involved the belief of quantum steps for bettering the power potency of all chip capabilities. With this moment quantity, we overview those messages and enlarge upon the main promising instructions: ultra-low-voltage electronics, nanoscale monolithic 3D integration, relevant-data, mind- and human-vision-inspired processing, and effort harvesting for chip autonomy. The staff of authors, enlarged via extra international leaders in low-power, monolithic 3D, video, and Silicon brains, offers new vistas in nanoelectronics, promising Moore-like exponential progress sustainable via to the 2030s.
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Extra info for CHIPS 2020 VOL. 2: New Vistas in Nanoelectronics
3V 1 Active Active Standby Standby Fig. 37 V  (© 2013 IEEE). a Cross-section of the SOTB transistor. b SEM Photo of the SRAM cell. c Access time of the SRAM. d Fail-bit of the SRAM as a function of Vdd. 3 V is applied . Although several SRAM circuit techniques were developed to operate the SRAM at low voltage, this demonstration was simply done by using the conventional 6-transistor SRAM cell without any voltage-boosting techniques for the word- and bit-lines to compare the technologies.
This indicates that the SRAM does not need ECC (error-correction-code) to rescue fail-bits, whereas the tail-portion of the fail-bits in the bulk-CMOS SRAM are usually rescued by the ECC circuits to increase the yield in low-voltage operation. It is also seen in Fig. 3 V as compared to the leakage in the active mode. This indicates the effectiveness of the threshold-voltage control in SOTB-CMOS. 3 Low-Voltage Microprocessor and Logic Circuits A low-voltage microprocessor with 144 KB SRAM was developed using 65 nm SOTB CMOS technology .
A Electric-power requirement for major ten IT and electronics equipments (PCs, servers, storages, routers, displays, TVs, DVD players, air-conditioners, refrigerators and illuminations) and data centers. b Electric-power requirement for servers, storages, routers and switches 2 The Future of Low-Power Electronics Solutions • Hybrid SOTB-CMOS • NV Memories • 3D-Integration 1015 Computations / KWhr. 23 1010 Challenges • Digital: Power=N(CV 2f + VILEAK) • Analog: Signal(Electrons)/Noise • Energy Delivery, ESD, Soft Errors 105 Vacuum Tube Transistor 1 1940 1950 1960 Bipolar-IC NMOS-LSI 1970 1980 1990 Bulk-CMOS 2000 2010 SOTB-CMOS NV Memory 2020 2030 Year Fig.